[1]陈新华,陈志恒,王志功,等.0.35 μm CMOS工艺实现的1.9 GHz上变频器[J].东南大学学报(自然科学版),2001,31(4):10-13.[doi:10.3969/j.issn.1001-0505.2001.04.003]
 Chen Xinhua,Chen Zhiheng,Wang Zhigong,et al.A 1.9 GHz Up-Conversion Mixer in 0.35 μm CMOS Technology[J].Journal of Southeast University (Natural Science Edition),2001,31(4):10-13.[doi:10.3969/j.issn.1001-0505.2001.04.003]
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0.35 μm CMOS工艺实现的1.9 GHz上变频器()
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《东南大学学报(自然科学版)》[ISSN:1001-0505/CN:32-1178/N]

卷:
31
期数:
2001年第4期
页码:
10-13
栏目:
电子科学与工程
出版日期:
2001-07-20

文章信息/Info

Title:
A 1.9 GHz Up-Conversion Mixer in 0.35 μm CMOS Technology
作者:
陈新华 陈志恒 王志功 姚胡静 方芳 谢婷婷
东南大学射频与光电集成电路研究所, 南京 210096
Author(s):
Chen Xinhua Chen Zhiheng Wang Zhigong Yao Hujing Fang Fang Xie Tingting
Institute of Radio-Frequency and Opto-Electronics Integrated Circuits, Southeast University, Nanjing 210096, China)
关键词:
射频集成电路 模拟CMOS集成电路 混频器
Keywords:
RFIC  analog CMOS integrated circuit mixer
分类号:
TN773
DOI:
10.3969/j.issn.1001-0505.2001.04.003
摘要:
分析了利用深亚微米CMOS工艺进行射频集成电路设计的方法,在此基础上设计出了采用标准0.35 μm CMOS工艺的输出频率在1.9 GHz的上变频器,它可以用在WCDMA发射/接收机中.整个设计利用SPICE软件和HP ADS软件进行电路和系统模拟,模拟结果:三阶互调IIP3为10 dBm,转换增益大于10 dB.已经利用Cadence工具进行版图设计和验证, 最后通过美国MOSIS工程流片.芯片面积大约为0.6 mm2.目前初步的性能测试已经完成.芯片混频效果良好.在单电源+3.3 V供电情况下,功耗小于60 mW.进一步的测试将在近期完成.
Abstract:
The design method of RF ICs with deep-sub-micron CMOS technology is analysed. On the basis of the analysis, an up-conversion mixer working at the frequency of 1.9 GHz with a standard 0.35 μm CMOS process is designed. Simulation in SPICE and HP ADS demonstrates the good performance of the chip with the IIP3 of 10 dBm and the conversion is greater than 10 dB. After the layout design in Cadence, the chip is realized with the help of MOSIS fabrication project in the U.S. The chip area is about 0.6 mm2. The chip is tested and a good performance of frequency-mixing is obtained. Under the voltage supply of 3.3 V, the power consumption is below 60 mW. further testing will be completed soon.

参考文献/References:

[1] Larson L E.Integrated circuit technology options for RFIC’s — present status and future directions.IEEE Journal of Solid-State Circuits,1998,33(3):387~399
[2] Razavi B.CMOS technology characterization for analog and RF design.IEEE Journal of Solid-State Circuits,1999,34(3):268~276
[3] Kundert K S.Introduction to RF simulation and its application.IEEE Journal of Solid-State Circuits,1999,34(9):1298~1319
[4] Lee T H,The design of CMOS radio-frequency integrated circuits.England:Cambridge University Press,1998.312~313

备注/Memo

备注/Memo:
作者简介:陈新华,男,1976年生,硕士研究生.
基金项目:国家863资助项目(863-317-03-04-99).
更新日期/Last Update: 2001-07-20