[1]周芳,吴宁,叶云飞,等.一种多重约束下的NoC电压频率岛划分方法[J].东南大学学报(自然科学版),2014,44(6):1131-1137.[doi:10.3969/j.issn.1001-0505.2014.06.007]
 Zhou Fang,Wu Ning,Ye Yunfei,et al.A NoC voltage-frequency islands partition method with multi-constraints[J].Journal of Southeast University (Natural Science Edition),2014,44(6):1131-1137.[doi:10.3969/j.issn.1001-0505.2014.06.007]
点击复制

一种多重约束下的NoC电压频率岛划分方法()
分享到:

《东南大学学报(自然科学版)》[ISSN:1001-0505/CN:32-1178/N]

卷:
44
期数:
2014年第6期
页码:
1131-1137
栏目:
计算机科学与工程
出版日期:
2014-11-20

文章信息/Info

Title:
A NoC voltage-frequency islands partition method with multi-constraints
作者:
周芳吴宁叶云飞葛芬
南京航空航天大学电子信息工程学院, 南京 210016
Author(s):
Zhou Fang Wu Ning Ye Yunfei Ge Fen
College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China
关键词:
片上网络 电压频率岛 整数线性规划 能耗
Keywords:
network on chip voltage-frequency islands integer linear program energy consumption
分类号:
TP301
DOI:
10.3969/j.issn.1001-0505.2014.06.007
摘要:
针对高性能低功耗的片上网络设计问题,提出一种多重约束下的电压频率岛划分方法.该方法以优化片上网络系统总能耗为目标,综合考虑电压频率岛个数、传输延时及网络中各PE节点的可靠性等多重约束条件,构建了适用于ILP的数学模型以解决片上网络的电压频率岛划分问题.使用LPSolve求解器对所建模型求解,并从E3S测试基准中选用多组测试用例和一个多媒体系统实例,验证了该方法的有效性.实验结果表明,该电压频率岛划分方法可在满足多重约束条件的同时,更加合理地划分片上网络的电压频率岛,有效地降低网络能耗.相比于随机划分方法和其他经典的划分方法,该方法可降低能耗9.1%~33.6%和16.7%.
Abstract:
To design the network-on-chip(NoC)with high performance and low power, a voltage-frequency islands(VFI)partition method with multi-constraints is proposed. Aiming at optimizing the energy consumption of NoC, the proposed method considers the number of voltage-frequency islands, delay and reliability as constraints. A mathematical model for the ILP(integer linear programming)algorithm is constructed and LPSolve is used to solve the problem of VFI partition. The validity of the VFI partition method is verified by several test cases chosen from the benchmark E3S and MMS(multimedia systems). The experimental results show that the proposed VFI partition method is more reasonable and achieves lower power while all the constraints are met. This method can get less power consumption from 9.1% to 33.6% and 16.7% than those by random method and other classic methods.

参考文献/References:

[1] Arjomand M, Sarbazi-Azad H. Voltage-frequency planning for thermal-aware, low-power design of regular 3-D NoCs[C]//23rd International Conference on VLSI Design. Bangalore, India, 2010: 57-62.
[2] Jung H, Pedram M. Supervised learning based power management for multicore processors [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2010, 29(9): 1395-1408.
[3] Sharifi S, Coskun A K, Rosing T S. Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs [C]//Proceedings of the 2010 Asia and South Pacific Design Automation Conference. Taipei, China, 2010: 873-878.
[4] Ogras U Y, Marculescu R, Choudhary P, et al. Voltage frequency island partitioning for GALS-based networks-on-chip [C]//Proceedings of the 44th Annual Conference on Design Automation. New York, 2007: 110-115.
[5] Ogras U Y, Marculescu R, Marculescu D, et al. Design and management of voltage-frequency island partitioned networks-on-chip [J]. IEEE Transactions on Very Large Scale Integration Systems, 2009, 17(3): 330-341.
[6] 刘斌,常振超,张兴明,等.一种基于遗传算法的片上网络电压岛划分方法[J].计算机应用研究,2012,29(10):3740-3743.
  Liu Bin, Chang Zhenchao, Zhang Xingming, et al. Genetic algorithm based NoC voltage-frequency island partition method[J]. Application Research of Computers, 2012, 29(10): 3740-3743.(in Chinese)
[7] Lee W, Liu H Y, Chan Y W. Voltage island aware floorplanning for power and timing optimization [C]//IEEE/ACM International Conference on Computer-Aided Design. San Jose, CA, USA, 2006: 389-394.
[8] Sengupta D, Saleh R A. Application-driven voltage-island partitioning for low-power system-on-chip design [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2009, 28(3): 316-326.
[9] Ghosh P, Sen A. Energy efficient mapping and voltage islanding for regular NoC under design constraints [J]. International Journal of High Performance Systems Architecture, 2010, 2(3/4): 132-144.
[10] Popovich M, Friedman E G, Sotman M, et al. On-chip power distribution grids with multiple supply voltages for high performance integrated circuits [C]//Proceedings of the 15th ACM Great Lakes symposium on VLSI. Chicago, IL, USA, 2005: 2-7.
[11] 常政威,熊光泽,桑楠,等.基于电压岛的能量和可靠性感知NoC映射[J].计算机辅助设计与图形学学报, 2009, 21(1):19-26.
  Chang Zhengwei, Xiong Guangze, Sang Nan, et al. Energy- and reliability-aware mapping for NoC implemented with voltage islands[J]. Journal of Computer-Aided Design & Computer Graphics, 2009, 21(1): 19-26.(in Chinese)
[12] 张剑贤,周端,杨银堂,等.处理器可靠性约束的电压频率岛NoC能耗优化[J].电子与信息学报,2011,33(9): 2205-2211.
  Zhang Jianxian, Zhou Duan, Yang Yintang, et al. Energy optimization of NoC based on voltage-frequency islands under processor reliability constraints[J]. Journal of Electronics & Information Technology, 2011, 33(9): 2205-2211.(in Chinese)
[13] Zhao B X, Aydin H, Zhu D. Reliability-aware dynamic voltage scaling for energy-constrained real-time embedded systems [C]//2008 IEEE International Conference on Computer Design. Lake Tahoe, CA, USA, 2008: 633-639.
[14] Yamamoto A Y, Ababei C. Unified system level reliability evaluation methodology for multiprocessor systems-on-chip[C]//2012 International Green Computing Conference. San Jose, CA, USA, 2012: 1-6.
[15] Zhu D K, Melhem R, Mosse D. The effects of energy management on reliability in real-time embedded systems [C]//Proceedings of the International Conference on Computer Aided Design. San Jose, CA, USA, 2004: 35-40.
[16] Dick R. Embedded system synthesis benchmarks suite(E3S)[EB/OL].(2013-06-20)[2014-6]. http://ziyang.eecs.umich.edu/~dickrp/e3s/.
[17] Ge F, Wu N. Genetic algorithm based mapping and routing approach for network on chip architectures [J]. Chinese Journal of Electronics, 2010, 19(1): 91-96.

相似文献/References:

[1]周芳,吴宁,张颖,等.面向传输延时的片上网络缓冲区分配算法[J].东南大学学报(自然科学版),2011,41(1):11.[doi:10.3969/j.issn.1001-0505.2011.01.003]
 Zhou Fang,Wu Ning,Zhang Ying,et al.Delay-aware buffer allocation algorithm for network on chip[J].Journal of Southeast University (Natural Science Edition),2011,41(6):11.[doi:10.3969/j.issn.1001-0505.2011.01.003]
[2]周芳,吴宁,周磊,等.面向低功耗的片上网络虚通道分配算法[J].东南大学学报(自然科学版),2013,43(2):263.[doi:10.3969/j.issn.1001-0505.2013.02.007]
 Zhou Fang,Wu Ning,Zhou Lei,et al.Low-power-aware virtual channel allocation algorithm for network on chip[J].Journal of Southeast University (Natural Science Edition),2013,43(6):263.[doi:10.3969/j.issn.1001-0505.2013.02.007]

备注/Memo

备注/Memo:
收稿日期: 2014-06-18.
作者简介: 周芳(1979—),女,博士生,讲师;吴宁(联系人),女,教授,博士生导师,wunee@nuaa.edu.cn.
基金项目: 国家自然科学基金资助项目(61376025,61106018)、江苏省产学研联合创新基金资助项目(BY2013003-11).
引用本文: 周芳,吴宁,叶云飞,等.一种多重约束下的NoC电压频率岛划分方法[J].东南大学学报:自然科学版,2014,44(6):1131-1137. [doi:10.3969/j.issn.1001-0505.2014.06.007]
更新日期/Last Update: 2014-11-20