[1]叶然,张春伟,刘斯扬,等.考虑场板边缘效应的SOI-pLDMOS表面电场模型及器件优化设计[J].东南大学学报(自然科学版),2015,45(2):214-218.[doi:10.3969/j.issn.1001-0505.2015.02.003]
 Ye Ran,Zhang Chunwei,Liu Siyang,et al.Surface electrical field model of SOI-pLDMOS considering edge effect of field plate and optimization design[J].Journal of Southeast University (Natural Science Edition),2015,45(2):214-218.[doi:10.3969/j.issn.1001-0505.2015.02.003]
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考虑场板边缘效应的SOI-pLDMOS表面电场模型及器件优化设计()
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《东南大学学报(自然科学版)》[ISSN:1001-0505/CN:32-1178/N]

卷:
45
期数:
2015年第2期
页码:
214-218
栏目:
电路与系统
出版日期:
2015-03-20

文章信息/Info

Title:
Surface electrical field model of SOI-pLDMOS considering edge effect of field plate and optimization design
作者:
叶然张春伟刘斯扬孙伟锋
东南大学国家专用集成电路系统工程技术研究中心, 南京 210096
Author(s):
Ye Ran Zhang Chunwei Liu Siyang Sun Weifeng
National ASIC System Engineering Technology Research Center, Southeast University, Nanjing 210096, China
关键词:
解析模型 表面电场 SOI-pLDMOS 边缘效应
Keywords:
analytical model surface field SOI-pLDMOS edge effect
分类号:
TN432
DOI:
10.3969/j.issn.1001-0505.2015.02.003
摘要:
针对带有栅极场板的绝缘体上硅p型横向双扩散场效应晶体管(SOI-pLDMOS),提出了一种新型表面电场解析模型.相比于传统模型,该模型充分考虑了场板边缘效应对电场分布的影响,验证结果显示新模型能更好地符合Medici数值仿真结果.此外,基于所建立的器件表面电场模型,研究了栅极场板长度(包括多晶硅场板和金属场板)及漂移区掺杂浓度对器件表面电场分布和击穿特性的影响,进而对SOI-pLDMOS进行了优化设计.流片测试表明,所建立的新型表面电场解析模型能够很好地指导器件参数设计,实现了器件耐压和导通电阻的最佳折中.
Abstract:
A new surface electrical field analytical model is presented for the p-type lateral double diffusion MOS(metal-oxide-semiconductor)transistor based on silicon on insulator(SOI-pLDMOS)with gate field plate. Compared with the traditional analytical model, the proposed model fully considers the influence of the edge effect of field plate upon the electrical field distribution. The results show that the presented model accords with the Medici simulations better. In addition, based on the new analytical model, the effects of the length of the gate field plate(including the polysilicon field plate and metal field plate)and the concentration of p-drift on electrical field distributions and breakdown characteristics are researched. Also, a SOI-pLDMOS is optimally designed. The test results demonstrate that the new surface electrical field analytical model can guide the design of device parameters and realize the best compromise between the breakdown voltage and on-resistance.

参考文献/References:

[1] 万维俊,刘斯扬,孙虎,等.高栅压低漏压条件下FG-pLEDMOS的热载流子退化机理[J].东南大学学报:自然科学版,2012,42(1):25-28.
  Wan Weijun, Liu Siyang, Sun Hu, et al. Mechanism of hot-carrier induced degradation in FG-pLEDMOS under high gate voltage low drain voltage stress [J]. Journal of Southeast University: Natural Science Edition, 2012, 42(1): 25-28.(in Chinese)
[2] Zhou Kun, Luo Xiaorong, Xu Qing, et al. A RESURF enhanced p-channel trench SOI LDMOS with ultral low specific on-resistance [J]. IEEE Transactions on Electron Devices, 2014, 61(7): 2466-2472.
[3] Miyoshi T, Tominari T, Fujiwara H, et al. Design of a reliable p-channel LDMOSFET with RESURF technology [J]. IEEE Transactions on Electron Devices, 2014, 61(5): 1451-1456.
[4] 郑维山,孙虎,刘斯扬,等.pLEDMOS导通电阻及阈值电压的热载流子退化[J].东南大学学报:自然科学版,2011,41(3):522-525.
  Zheng Weishan, Sun Hu, Liu Siyang, et al. On-resistance and threshold voltage hot-carrier degradation of pLEDMOS [J]. Journal of Southeast University: Natural Science Edition, 2011, 41(3): 522-525.(in Chinese)
[5] Nandi A, Saxena A K, Dasgupta S. Analytical modeling of a double gate MOSFET considering source/drain lateral Gaussian doping profile [J]. IEEE Transactions on Electron Devices, 2013, 60(11): 3705-3709.
[6] Coffie R. Analytical field plate model for field effect transistors [J]. IEEE Transactions on Electron Devices, 2014, 61(3): 878-883.
[7] Sun Weifeng, Shi Longxing. Analytical models for the surface potential and electrical field distribution of bulk-silicon RESURF devices [J]. Solid-State Electronics, 2004, 48(5): 799-805.
[8] Chung S K, Han S Y. Analytical model for the surface field distribution of SOI RESURF devices [J]. IEEE Transactions on Electron Devices, 1998, 45(6): 1374-1376.
[9] Huang Haimeng, Wang Yongwei, Chen Xingbi. An analytical model for SOI triple RESURF devices [C]//IEEE 9th International Conference on ASIC. Xiamen, China, 2011: 547-550.
[10] 李琦,张波,李肇基.带p埋层表面注入硅基LDMOS模型与优化[J].半导体学报,2007,28(8):1267-1271.
  Li Qi, Zhang Bo, Li Zhaoji. Analytical model and optimization of bulk-silicon surface implanted LDMOS with p buried layer [J]. Journal of Semiconductors, 2007, 28(8): 1267-1271.(in Chinese)
[11] Kozlov A V, Cheremisinov A A, Polomoshnov S A, et al. Model of effect of pn-junction magnetic field modulation [C]//International Conference and Seminar of Young Specialists on Micro/Nanotechnologies and Electron Devices. Erlagol, Russia, 2011: 137-139.
[12] 孟坚,高珊,陈军宁,等.用阱作高阻漂移区的LDMOS导通电阻的解析模型[J].半导体学报,2005,26(10):1983-1988.
  Meng Jian, Gao Shan, Chen Junning, et al. An analytical model of a LDMOS on-resistance using a well as a high resistance drift region [J]. Journal of Semiconductors, 2005, 26(10): 1983-1988.(in Chinese)

备注/Memo

备注/Memo:
收稿日期: 2014-09-16.
作者简介: 叶然(1991—),男,硕士生;孙伟锋(联系人),男,博士,教授,博士生导师,swffrog@seu.edu.cn.
基金项目: 港澳台科技合作专项资助项目(2014DFH10190)、江苏省青蓝工程资助项目、东南大学研究生科研基金资助项目(YBPY1403).
引用本文: 叶然,张春伟,刘斯扬,等.考虑场板边缘效应的SOI-pLDMOS表面电场模型及器件优化设计[J].东南大学学报:自然科学版,2015,45(2):214-218. [doi:10.3969/j.issn.1001-0505.2015.02.003]
更新日期/Last Update: 2015-03-20