[1]李秀军,刘斯扬,李胜,等.基于表面势的碳化硅基VDMOS器件模型[J].东南大学学报(自然科学版),2018,48(1):13-18.[doi:10.3969/j.issn.1001-0505.2018.01.003]
 Li Xiujun,Liu Siyang,Li Sheng,et al.Surface-potential-based SiC VDMOS device model[J].Journal of Southeast University (Natural Science Edition),2018,48(1):13-18.[doi:10.3969/j.issn.1001-0505.2018.01.003]
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基于表面势的碳化硅基VDMOS器件模型()
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《东南大学学报(自然科学版)》[ISSN:1001-0505/CN:32-1178/N]

卷:
48
期数:
2018年第1期
页码:
13-18
栏目:
电子科学与工程
出版日期:
2018-01-20

文章信息/Info

Title:
Surface-potential-based SiC VDMOS device model
作者:
李秀军刘斯扬李胜孙伟锋
东南大学国家专用集成电路系统工程技术研究中心, 南京210096
Author(s):
Li Xiujun Liu Siyang Li Sheng Sun Weifeng
National ASIC System Engineering Technology Research Center, Southeast University, Nanjing 210096, China
关键词:
表面势模型 碳化硅基 VDMOS 阈值电压偏移 界面态
Keywords:
surface-potential-based model silicon carbon(SiC) vertical double-implantation metal oxide semiconductor transistor(VDMOS) threshold voltage offset interface state
分类号:
TN386
DOI:
10.3969/j.issn.1001-0505.2018.01.003
摘要:
为了满足功率电路及系统设计对碳化硅基垂直双注入金属氧化物半导体晶体管(VDMOS)模型的需求,建立了一套基于表面势计算方法的可描述碳化硅基VDMOS器件电学特性的模型.模型包括静态部分与动态部分.静态部分不仅分别针对沟道区、积累区、寄生结型场效应晶体管(JFET)区及N-外延层建立电流模型,还考虑了界面态对于阈值电压偏移与沟道迁移率的影响.动态部分中引入了界面陷阱对于电容的影响,完善了基于端电荷划分理论的动态模型.结果表明,所提器件模型的输出特性和转移特性的仿真结果与实测结果之间的均方根误差均小于5%,开关特性的仿真结果与实测结果之间的均方根误差小于10%.
Abstract:
To meet the requirements of the power circuit and system design for the silicon carbide(SiC)vertical double-implantation metal oxide semiconductor transistor(VDMOS)device models, a model for descripting the electrical characteristics of SiC VDMOS based on the surface potential calculation method is proposed. This model includes the static part and the dynamic part. In the static model, the current models are built for the channel region,the accumulation region, the junction field effect transistor(JFET)region, and the N-epitaxy layer, respectively. The effects of the interface states on the threshold voltage offset and the channel mobility are considered. In the dynamic model, the influence of the interface trap on the capacitance is introduced and the dynamic model based on the terminal charge division theory is perfected. The results show that the root mean square errors of the simulation results and the measurement results for the output characteristic and the transfer characteristics simulated by the surface-potential-based model of SiC VDMOS are less than 5%, and those for the switching characteristic are less than 10%.

参考文献/References:

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备注/Memo

备注/Memo:
收稿日期: 2017-07-26.
作者简介: 李秀军(1993—),男,硕士生;孙伟锋(联系人),男,博士,教授,博士生导师,swffrog@seu.edu.cn.
基金项目: 国家自然科学基金资助项目(61604038, 61674030)、江苏省自然科学基金资助项目(BK20160691).
引用本文: 李秀军,刘斯扬,李胜,等.基于表面势的碳化硅基VDMOS器件模型[J].东南大学学报(自然科学版),2018,48(1):13-18. DOI:10.3969/j.issn.1001-0505.2018.01.003.
更新日期/Last Update: 2018-01-20