[1]梁宇,韩奇,魏同立,等.低功耗数字系统设计方法[J].东南大学学报(自然科学版),2000,30(5):136-142.[doi:10.3969/j.issn.1001-0505.2000.05.030]
 Liang Yu,Han Qi,Wei Tongli,et al.Low Power Design Methodology[J].Journal of Southeast University (Natural Science Edition),2000,30(5):136-142.[doi:10.3969/j.issn.1001-0505.2000.05.030]
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低功耗数字系统设计方法()
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《东南大学学报(自然科学版)》[ISSN:1001-0505/CN:32-1178/N]

卷:
30
期数:
2000年第5期
页码:
136-142
栏目:
电路与系统
出版日期:
2000-09-20

文章信息/Info

Title:
Low Power Design Methodology
作者:
梁宇1 韩奇1 魏同立1 郑茳2
1 东南大学微电子中心,南京 210096; 2 摩托罗拉苏州设计中心, 苏州 215011
Author(s):
Liang Yu1 Han Qi1 Wei Tongli1 Zheng Jiang2
1 Microelectronic Center, Southeast University, Nanjing 210096
2 Motorola Electronic Ltd. Suzhou Branch, Suzhou 215011
关键词:
低功耗 超大规模集成电路 设计方法
Keywords:
low power VLSI methodology
分类号:
TN47
DOI:
10.3969/j.issn.1001-0505.2000.05.030
摘要:
首先对集成电路的功耗来源进行简要的分析.在此基础上,按照不同的设计层次,分别介绍了系统层、寄存器传输层、版图层的各种主要的低功耗设计技术,重点分析了不同技术的基本思路和进一步发展的方向.最后,从整体设计流程的角度介绍了前馈型的设计方法,进一步指出高层设计层次中的低功耗设计方法和技术在未来数字系统功耗设计中的重要性.
Abstract:
The need to reduce the power consumption of the next generation of digital systems is clearly recognized with the increasing application of portable device and high performance system. The power sources of the VLSI are analyzed. This paper surveys a range of power optimization techniques used at different levels of design abstraction and the top-down low power design methodology. A forward feed design flow is introduced and the importance of the higher-level power optimization of design abstract is illustrated.

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备注/Memo

备注/Memo:
第一作者:男, 1973年生, 博士研究生.
更新日期/Last Update: 2000-09-20